* [[Introduction]] * [[introduction#motivation|Motivation]] * [[introduction#general_approach|General Approach]] * [[introduction#objectives|Objectives]] * [[Related Work]] * [[related_work#cgraarch|Coarse-Grained Reconfigurable Architectures]] * [[related_work#comptable|Comparison Table]] * [[related_work#dynamicpartial|Dynamic Partial Reconfiguration]] * [[Implementations]] * [[implementations#prototypes|Prototypes Architectures]] * [[implementations#Toolflow]] * [[tools#graph2hex|graph2bricks]] * [[tools#graph2bricks|graph2hex]] * [[tools#codegen|Code generation scripts]] * [[results|Results]] * [[WorkPlan]] * [[workplan#task_list|Task List]] * [[workplan#on-going_work|On-Going Work]] * [[phd_papers|Publications]] * [[Workbench]] * [[workbench#development_environments|Development Environments]] * [[workbench#development_platforms|Development Platforms]] * [[Digilent Nexys2]] * [[Digilent Atlys]] * [[digilent_atlys#digilent_atlys_reference_designs|Reference Designs]] * [[Avnet ZedBoard]] * [[ipcores|IP Cores]] * [[About]]

<html><center><br> <strong><font size="5">Ph.D. Topic</font></strong><br><br> <font size="6" style="line-height: 1.5em;">Transparent Hardware Generation from Assembly Code at Program Execution Time</font><br></html> [[start|{{logo_feup.png?450|FEUP Logo}}]] <html><font size="4">Nuno Miguel Cardanha Paulino</font></html> [[[email protected]]] <html></center></html>

 
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