COBAYA: CLOSING THE COMPILATION GAP BETWEEN ALGORITHMS AND COARSE-GRAINED RECONFIGURABLE ARRAY ARCHITECTURES

RESEARCH PROJECT

· To define an intermediate representation format well suited to dynamic compilation to the reconfigurable processing unit (RPU).

· To research new compiler techniques and hardware schemes that can both aim efficient compilation of software programming languages to reconfigurable computing platforms, especially coarse-grained reconfigurable arrays connected to a microprocessor as an RPU.

· To research and evaluate novel array architectures for the RPU. Those architectures can be used to save energy or/and to increase performance. Their study will be done bearing in mind an easier way to map imperative programming languages to this kind of architectures.

· To understand better runtime reconfigurable features and to propose new schemes for switching not only between architectural templates but also between configurations of a specific architectural template.

· To acquire deeper knowledge about computational intensive mobile robotic algorithms, their requisites, data layout and computational structures used.

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