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[patents] [Books] [Thesis] [International
Publications] [National Publications]
João M. P. Cardoso, and Pedro
C. Diniz, Compilation Techniques for Reconfigurable Architectures,
Springer, 234 p., October 2008, ISBN 978-0-387-09670-4.
|
2010 |
João M. P. Cardoso, Pedro
Diniz, and Markus Weinhardt, “Compilation
for Reconfigurable Computing: A Survey,” ACM Computing Surveys (CSUR), schedule
for vol. 42, issue # 4, December 2010 [online version will appear very soon in
the ACM Digital Library].
|
2009 |
André C. Santos, João M.P.
Cardoso, Diogo R. Ferreira, Pedro C. Diniz, “Mobile Context Provider for
Social Networking,” in Fourth
International Workshop on MObile and NEtworking Technologies for social applications (MONET´09),
Vilamoura, Algarve-Portugal, Nov. 1-6, 2009, Springer Verlag
(to appear).
Rui Marcelino, Horacio Neto,
and João M. P: Cardoso, “A Comparison of Three Representative Hardware
Sorting Units,” in IEEE IECON 2009 the
35th Annual Conference of the IEEE Industrial Electronics Society, Alfandega Congress Center, Porto, Portugal, 3-5 November
2009. (to appear)
R. Menotti, J. M. P. Cardoso,
M. M. Fernandes, and E. Marques, “LALP: A Novel Language to Program Custom
FPGA-based Accelerator Architectures,” in 21st International Symposium on Computer Architecture and High
Performance Computing (SBAC–PAD’2009), Sao Paulo, Brazil, October 28-31,
2009, IEEE Computer Society Press (to appear).
R. Menotti, J. M. P. Cardoso,
M. M. Fernandes, and E. Marques, “Automatic Generation of FPGA Hardware
Accelerators Using a Domain Specific Language,” in 19th In-ternational Conference on Field
Programmable Logic and Applications (FPL’2009). Czech Republic, August 31
to September 2, 2009. (to appear)
João M. P. Cardoso, João Bispo,
and Adriano K. Sanches, “The Role of
Programming Models on Reconfigurable Computing Fabrics,” Chapter XII in the
book: Behavioral Modeling for Embedded Systems and Technologies: Applications
for Design and Implementation, Luís Gomes, João M. Fernandes (eds.), IGI
Global, ISBN: 978-1-60566-750-8, July 2009.
André C. Santos, Luís
Tarrataca, João M. P. Cardoso, Diogo R. Ferreira, Pedro C. Diniz, and Paulo
Chainho, “Context Inference for Mobile Applications in the UPCASE Project”,
In Proceedings of the 2nd International ICST Conference on MOBILe
Wireless MiddleWARE, Operating Systems, and
Applications (Mobilware’09), Berlin, Germany, April 28-29, LNICST, Vol. 7,
Springer, 2009, pp. 352-365.
André C. Santos, Luís Tarrataca,
João M. P. Cardoso, “An Analysis of Navigation Algorithms for Smartphones using J2ME”. In Proceedings of the 2nd
International ICST Conference on MOBILe Wireless MiddleWARE, Operating Systems, and Applications
(Mobilware’09), Berlin, Germany, April 28-29, LNICST, Vol. 7, Springer, 2009,
pp. 266-279.
Ricardo Ferreira, Alex Assis,
Tiago Teixeira, Julio Vendramini, João M. P. Cardoso, “On Simplifying
Placement and Routing by Extending Coarse-Grained Reconfigurable Arrays with
Omega Networks,” in International
Workshop on Applied Reconfigurable Computing (ARC 2009), 16-18 March 2009,
Karlsruhe, Germany, Springer LNCS 5453, pp. 145-156.
Luís Tarrataca, André C.
Santos, and João M. P. Cardoso, “The Current Feasibility of Gesture
Recognition for a Smartphone using J2ME,” in Annual ACM Symposium on Applied Computing (SAC’09), Technical
track: Embedded Systems: Applications, Solutions, and Techniques, Hawaii, USA,
March 8-12, 2009.
|
2008 |
João Bispo, João M. P. Cardoso, “Synthesis of Regular Expressions for
FPGAs”, International Journal of
Electronics (IJE), Taylor & Francis, Volume 95, Issue 7, January 2008,
pp. 685-704.
Yiannis Sourdis, João Bispo, João M. P. Cardoso, and Stamatis
Vassiliadis, “Regular
Expression Matching in Reconfigurable Hardware,” in The Journal of VLSI Signal Processing Systems, Springer, Volume 51, Number 1, April, 2008, pp. 99-121. http://www.springerlink.com/content/ck107775u5443781/
João M. P. Cardoso,
and Pedro Diniz (Eds.), Guest Editorial: IJE special issue on
reconfigurable hardware systems, in International Journal of Electronics (Taylor
& Francis), Volume 95, Issue 7, January 2008, pages 601-602.
João M. P. Cardoso, “A teaching strategy for developing application
specific architectures for FPGAs,” in International
Journal of Engineering Education (IJEE), volume 24, number 4, Part II, July
2008, pp. 833-842.
Carlos Morra, João Bispo, João
M. P. Cardoso, and Juergen Becker, “Combining Rewriting-Logic, Architecture
Generation, and Simulation to Exploit Coarse-Grained Reconfigurable
Architectures,” in The Sixteenth Annual IEEE Symposium on
Field-Programmable Custom Computing Machines (FCCM’08), Stanford, Palo Alto,
CA, USA, April 14-15, 2008, IEEE Computer Society Press, pp.
Carlos Morra, João M. P.
Cardoso, João Bispo, and Juergen Becker, “Retargeting, Evaluating, and
Generating Reconfigurable Array-Based Architectures,” in 6th IEEE Symposium
on Application Specific Processors (SASP 2008), 8-9 June 2008, Anaheim
Convention Center, Anaheim CA, USA, pp. 34–41.
Rui Marcelino, Horácio Neto, João M. P. Cardoso, "Sorting Units
for FPGA-Based Embedded Systems," in IFIP Working Conference on
Distributed and Parallel Embedded Systems (DIPES'08), Milano, Italy, September
7-10, 2008, IFIP International Federation for Information Processing, Springer,
Boston, Distributed Embedded Systems: Design, Middleware and Resources; Bernd
Kleinjohann, Lisa Kleinjohann, Wayne Wolf (eds.), Volume 271, Springer, July
2008, pp. 11-22.
João Bispo, and João M. P.
Cardoso, “A Preliminary Idea for Adapting Programs to Parallel Environments,“
In Proceedings of ACACES 2008 Poster Abstracts: Advanced Computer Architecture
and Compilation for Embedded Systems, Academia Press, Ghent, Belgium, 2008. pp.
231-234.
Adriano K. Sanches, and João M.
P. Cardoso, “Pattern-Mining over Repositories of Benchmarks to Identify and
Suggest Reconfigurable Functional Units: A Preliminary Step”, In
Proceedings of ACACES 2008 Poster Abstracts: Advanced Computer Architecture and
Compilation for Embedded Systems, Academia Press, Ghent, Belgium, 2008. pp.
227-230.
|
2007 |
Pedro C. Diniz, Eduardo
Marques, Koen Bertels, Marcio M. Fernandes, and João M.P. Cardoso (Eds.), Reconfigurable
Computing: Tools Architectures and Applications, Third
International Workshop, ARC 2007, Rio de Janeiro, Brazil, March 2007, Springer Lecture Notes in Computer Science, LNCS
4419, March 2007.
João M.P. Cardoso, Koen
Bertels, George Constantinides, and Stamatis Vassiliadis (Eds.), Guest
editorial: Special Issue on Reconfigurable Hardware Systems, in International Journal of Electronics (Taylor
& Francis), Vol. 94, Issue 5 May 2007, pp. 431-433.
Rui Rodrigues, and João M. P.
Cardoso, “On Pipelining Sequences of Data-Dependent Loops,” in Journal
of Universal Computer Science (JUCS), Vol. 13,
Issue 3, 2007, pp. 419-439.
Rui Rodrigues, João
M. P. Cardoso, and Pedro C. Diniz, “A Data-Driven Approach for Pipelining
Sequences of Data-Dependent Loops,” in 15th Annual IEEE Symposium on Field Programmable
Custom Computing Machines (FCCM’07), Napa Valley,
CA, USA, April 23 - April 25, 2007, IEEE Computer Society Press.
José A. de Holanda,
Jecel Assumpção Jr., Denis
F. Wolf, Eduardo Marques, and João M. P.
Cardoso, “On Adapting Power Estimation Models for Embedded Soft-Core
Processors,” in IEEE Second
International Symposium on Industrial Embedded Systems (SIES'2007), July
4-6, 2007, Hotel Costa da Caparica, Lisbon, Portugal,
pp. 345-348.
Vanderlei Bonato, Rafael Peron,
Carlos Morra, João M.
P. Cardoso, and Juergen Becker, “Using
Rewriting Logic to Match Patterns of Instructions from a Compiler Intermediate Form
to Coarse-Grained Processing Elements,” in 14th Reconfigurable
Architectures Workshop (RAW’07), Long Beach, California, USA, March 27 - 28,
2007, IEEE Computer Society Press.
João Bispo, Yiannis
Sourdis, João M. P. Cardoso, and Stamatis Vassiliadis, “Synthesis of Regular Expressions Targeting
FPGAs: Current Status and Open Issues,” in International Workshop on Applied Reconfigurable Computing (ARC’07),
Mangaratiba,
Ricardo Ferreira, Alisson
Garcia, Tiago Teixeiras, and João M. P. Cardoso, “A Polynomial
Placement Algorithm for Data Driven Coarse-Grained Reconfigurable
Architectures,” in IEEE Computer
Society Annual Symposium on VLSI, May 9-11, 2007, Porto Alegre,
Brazil, IEEE Computer Society Press.
|
2006 |
Koen Bertels, João M.P.
Cardoso, and Stamatis Vassiliadis
(Eds.), Reconfigurable
Computing: Architectures and Applications, Second International
Workshop, ARC 2006 Delft, The Netherlands, March 2006, Revised Selected Papers,
Springer Lecture Notes in Computer
Science, LNCS 3985, August 2006.
João M. P. Cardoso, and George
Constantinides (eds.), Guest
Editorial: Applied reconfigurable computing, in International Journal of Electronics (Taylor
& Francis), Vol. 93, No. 6, June 2006, pp. 347-348.
João Bispo, Yiannis Sourdis, João M. P. Cardoso, Stamatis
Vassiliadis, “Regular Expression Matching for Reconfigurable
Packet Inspection,”
in IEEE
International Conference on Field Programmable Technology (FPT’06), December 13-15, 2006, Bangkok Thailand, IEEE Computer Society
Press, pp. 119-126.
Ricardo Ferreira, Marcos Vinicius Silva, Alisson Garcia,
and João M. P. Cardoso, “Mesh Mapping Exploration for Coarse-Grained
Reconfigurable Array Architectures,” in 3rd International Conference on ReConFigurable
Computing and FPGAs (ReConFig’06), San Luis Potosi, Mexico, September
20-22, 2006, IEEE Computer Society Press, pp. 1-10.
João Lima,
João M. P. Cardoso, João M.
Fernandes, and Miguel Monteiro, “Adding
Aspect-Oriented Features to MATLAB,” in SPLAT! 2006, Software Engineering Properties of Languages and Aspect
Technologies, A workshop affiliated with AOSD 2006, March 21, 2006.
w Jorge Silva, Marcio M. Fernandes, Vanderlei Bonato,
|
2005 |
João M. P. Cardoso (editor), Proceedings
of the International Workshop on Applied Reconfigurable Computing (ARC2005),
Algarve,
João M. P. Cardoso, and Markus
Weinhardt, “Compilation and Temporal
Partitioning for a Coarse-grain Reconfigurable Architecture,” Chapter 9 in New Algorithms, Architectures, and
Applications for Reconfigurable Computing, Patrick Lysaght
and Wolfgang Rosenstiel (eds.), Springer, April 2005.
pp. 105-115. ISBN 1-4020-3127-0.
João M. P. Cardoso, “On
Estimations for Compiling Software to FPGA-based Systems,” in IEEE 16th International Conference on
Application-specific Systems, Architectures and Processors (ASAP’05),
João M. P. Cardoso, “New
Challenges in Computer Science Education,” in 10th ACM Annual Conference on Innovation and
Technology in Computer Science Education (ITiCSE’05), Universidade
Nova de Lisboa, Lisbon, Portugal, June 27-29, 2005,
ACM Press, pp. 203-207.
Ricardo Ferreira, João M. P.
Cardoso, Andre Toledo, and Horácio C. Neto, “Data-driven Regular Reconfigurable
Arrays: Design Space Exploration and Mapping,” in Embedded Computer Systems: Architectures,
Modeling, and Simulation 5th International Workshop, Timo
D. Hämäläinen, Andy D. Pimentel, Jarmo
Takala, Stamatis Vassiliadis (Eds.), SAMOS 2005, Samos, Greece, July 18-20,
2005, LNCS 3553 Springer, pp. 41-50.
João M. P. Cardoso,
“Data-driven array architectures: a rebirth?,” in SPIE Microtechnologies for the New Millennium
2005 Symposium, Seville, Spain, May 9-11, 2005, SPIE Vol. 5837, pp.
479-490.
João M. P. Cardoso, “CHIADO:
compilation of high-level computationally intensive algorithms to dynamically
reconfigurable computing systems,” in SPIE
Microtechnologies for the New Millennium 2005
Symposium,
João M. P. Cardoso, “Dynamic
Loop Pipelining in Data-Driven Architectures,” in Proc. of the ACM International Conference on
Computing Frontiers (CF’05), Ischia, Italy, 4-6 May 2005, ACM Press, pp.
106-115.
Rui Rodrigues, and João M. P.
Cardoso, “A Test Infrastructure for Compilers Targeting FPGAs,” in
International Workshop on Applied
Reconfigurable Computing (ARC2005), held in conjunction with IADIS International Conference Applied
Computing 2005,
Rui Rodrigues, and João M. P.
Cardoso, “Pipelining Sequences of Loops: A First Example,” in International Workshop on Applied
Reconfigurable Computing (ARC2005), held in conjunction with IADIS International Conference Applied
Computing 2005,
Rui Rodrigues, and João M. P.
Cardoso, “An Infrastructure to Functionally Test Designs Generated by
Compilers Targeting FPGAs,” Interactive Presentation at the Design, Automation and Test in Europe
Conference (DATE’05),
|
2004 |
João M. P. Cardoso, and Horácio C. Neto, “Compilation for FPGA-Based
Reconfigurable Hardware,” IEEE Design & Test of Computers Magazine, March/April, 2003, vol. 20,
no.2, pp. 65-75.
João M. P. Cardoso, “On
Combining Temporal Partitioning and Sharing of Functional Units in Compilation
for Reconfigurable Architectures,” in IEEE Transactions on Computers, Vol. 52, No. 10, October 2003, pp.
1362-1375.
Ricardo Ferreira, João M. P.
Cardoso, and Horácio C. Neto, “An Environment for Exploring Data-Driven
Architectures,” in 14th
International Conference on Field Programmable Logic and Applications (FPL’04),
Antwerp, Belgium, August 30 - September 1, 2004, LNCS 3203, Springer-Verlag,
Vanderlei Bonato, Adriano K.
Sanches, Márcio Fernandes, João M. P. Cardoso,
Eduardo Simões, and Eduardo Marques, “A Real Time Gesture Recognition System for
Mobile Robots,” In International
Conference on Informatics in Control, Automation, and Robotics (ICINCO’04),
August 25-28, Setúbal, Portugal, 2004, INSTICC, pp.
207-214.
João M. P. Cardoso, and Pedro
C. Diniz, “Modeling Loop Unrolling: Approaches and
Open Issues,” in International
Workshop on Systems, Architectures, MOdeling, and
Simulation (SAMOS IV),
João M. P. Cardoso, “Self Loop Pipelining and Reconfigurable Dataflow Arrays,”
in International Workshop on Systems,
Architectures, MOdeling, and Simulation (SAMOS IV),
w
Gil Moreira, João M. P.
Cardoso, “Easy Development of GUIs Using XML and Java Reflection,” in Proc. of the IADIS International Conference
Applied Computing,
|
2003 |
João M. P. Cardoso, “Loop Dissevering: A Technique
for Temporally Partitioning Loops in Dynamically Reconfigurable Computing
Platforms,” in 10th
Reconfigurable Architectures Workshop (RAW 2003), Nice,
João M. P. Cardoso, and Markus
Weinhardt, “From C
Programs to the Configure-Execute Model,” in Proc. of the Design, Automation and Test in Europe Conference (DATE’03),
R. A. Gonçalves, P.A. Moraes, J. M. P. Cardoso, D. F. Wolf, M. M. Fernandes, R.
A. F. Romero, E. Marques, “ARCHITECT-R: A System for
Reconfigurable Robots Design,” in ACM
Symposium on Applied Computing (SAC 2003), March 9-12, Melbourne, Florida, EUA,
2003, ACM Press, NY, USA, pp. 679-683.
|
2002 |
João M. P. Cardoso, and Markus
Weinhardt, “XPP-VC: A C Compiler with Temporal
Partitioning for the PACT-XPP Architecture,” in 12th International
Conference on Field Programmable Logic and Applications (FPL'02),
Montpellier, France, Sept. 2-4, 2002, Proceedings LNCS (Lecture Notes on
Computer Science) 2438, Springer Verlag, M. Glesner, P. Zipf, M. Renovell (Eds.), August 2003, pp. 864-874.
João M. P. Cardoso, and Markus
Weinhardt, “Fast
and Guaranteed C Compilation onto the PACT-XPP Reconfigurable Computing
Platform,” In Proc. of the IEEE
10th Symposium on Field-Programmable Custom Computing Machines
(FCCM'02), Napa Valley, California, USA, April 21 - 23, 2002. In Kenneth L.
Pocek and Jeffrey M. Arnold (Editors), IEEE
Computer Society Press, Los Alamitos, CA, USA, pp. 291-292. [presented
as a poster]
|
2001 |
João M. P. Cardoso, “A Novel Algorithm Combining Temporal Partitioning and Sharing of
Functional Units,” In IEEE 9th Symposium on
Field-Programmable Custom Computing Machines (FCCM'01), Rohnert Park, California, USA, April 30 – May
2, 2001, IEEE Computer Society Press, Los Alamitos, CA, USA, pp. 31-40. [Presentation Slides in Power Point]
João M. P. Cardoso, and Horácio C. Neto, “Compilation Increasing the Scheduling Scope for
Multi-Memory-FPGA-based Custom Computing Machines,” In 11th
International Conference on Field Programmable Logic and Applications (FPL'01),
G. Brebner, and R. Woods (Eds.), Field-Programmable
Logic and Applications 11th International Conference, FPL 2001, Belfast,
Northern Ireland, UK, August 27-29, 2001, Proceedings LNCS (Lecture Notes on
Computer Science) 2147, Springer Verlag, Gordon J. Brebner, Roger Woods (Eds.), August 2001, pp. 523-533.
João M. P. Cardoso, and Horácio C. Neto, “Architectural Synthesis Exposing
Parallelism and Increasing the Scheduling Scope for FPGA-based Digital
Systems,” In Proc. of the 5th World Multi-Conference on Systemics, Cybernetics and Informatics (SCI’01) and the 7th
Int. Conf. on Information Systems Analysis and Synthesis (ISAS’01), July
22-25, Orlando, Florida, USA, Vol. XI, Information Systems Technology.
|
1999 |
João M. P. Cardoso, and Mário
P. Véstias, “Architectures and Compilers to Support Reconfigurable
Computing,” Crossroads, the Association for
Computing Machinery (ACM) Student Magazine, topic: Computer
Architectures, Spring 1999, Issue 5.3, ACM Press, New York, USA, pp. 15-22.
Version online at: http://www.acm.org/crossroads/xrds5-3/rcconcept.html
João M. P. Cardoso, and Horácio C. Neto, “An Enhanced Static-List Scheduling Algorithm for Temporal Partitioning
onto RPUs,” In Proc. of the IFIP TC10 WG10.5 X International Conference on Very Large
Scale Integration (VLSI'99),
João M. P. Cardoso, and Horácio C. Neto, "Fast Hardware Compilation of Behaviors into
an FPGA-Based Dynamic Reconfigurable Computing System," In Proceedings
of the XII Symposium on Integrated Circuits and Systems Design (SBCCI’99),
Natal-RN, Brazil, Sept. 29-Oct. 2, 1999, Co-Sponsored by the Brazilian Computer
Society and the IFIP WG 10.5. In
Vladimir C. Alves, Marcelo Lubaszewski and Ivan S. Silva (Editors), IEEE
Computer Society Press, Los Alamitos, CA, USA, pp. 150-153.
João M. P. Cardoso, and Horácio C. Neto, "Macro-Based
Hardware Compilation of Java(tm) Bytecodes into a
Dynamic Reconfigurable Computing System," In Proceedings of the
7th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'99),
Napa Valley, California, USA, April 21 - 23, 1999, In Kenneth L. Pocek and Jeffrey M. Arnold (Editors), IEEE Computer
Society Press, Los Alamitos, CA, USA, pp. 2-11.
|
1998 |
João M. P. Cardoso, and Horácio C. Neto, "An Approach to Hardware Synthesis from a
System Java(tm) Specification," In the Proceedings of the 1st
International Workshop on Design, Test and Applications (WDTA'98),
Sponsored by IEEE Region 8 and IEEE TTTC,
João M. P. Cardoso, and Horácio C. Neto, "Towards an Automatic
Path from Java(tm) Bytecodes to Hardware Through
High-Level Synthesis," In Proceedings of the 5th IEEE
International Conference on Electronics, Circuits and Systems (ICECS'98),
Lisbon, Portugal, September 7-10, 1998, pp. 85-88.
|
1996 |
João M. P. Cardoso, and Horácio C. Neto, "A Parameterizable
Processor Core for Fast Turnaround Co-Synthesis of Embedded Systems,”
In Proceedings of the XI SBMicro Conference (SBMICRO’96),
Águas de Lindóia - SP -
Brazil , July 29 - August 2, 1996, pp. 16-21.
João M. P. Cardoso, Horácio C. Neto, "A Co-synthesis
Environment for Embedding Digital Systems in a Sea-of-gates IC,” In Proceedings
of the XI Conference on Design of Integrated Circuits and Systems (DCIS'96),
Sitges (Barcelona), November 19-22, 1996, pp.
411-416.
João M. P.
Cardoso, and José Carlos Alves (eds.), Actas das Jornadas sobre Sistemas Reconfiguráveis
(REC2005), Universidade do Algarve, Portugal, 21 February 2005, ISBN
972-9341-41-9.
Paulo
Chainho, João M. P. Cardoso, Diogo S. Ferreira, “UPCASE (User Programmable
Context-Aware Services),” in Revista Saber&Fazer Telecomunicações,
Portugal Telecom, Portugal, 2008.
Tiago
Teixeira, Ricardo Ferreira, João M.P. Cardoso, “Explorando com
Meta-Heurística o Espaço de Projeto de Arquiteturas Reconfiguráveis de Grão
Grosso,” in V Jornadas sobre Sistemas Reconfiguráveis - REC'2009, Faculdade
de Ciências e Tecnologia da Universidade Nova de Lisboa, Monte de Caparica,
Portugal, 5-6 Fevereiro 2009.
Ricardo
Ferreira, Alex Damiany, Julio Vendramini, João M. P. Cardoso, “Mapeamento em
Arquitecturas Reconfiguráveis de Grão Grosso com Redes Multiestágios,” in V
Jornadas sobre Sistemas Reconfiguráveis - REC'2009, Faculdade de Ciências e
Tecnologia da Universidade Nova de Lisboa, Monte de Caparica, Portugal, 5-6
Fevereiro 2009.
João Bispo,
Yiannis Sourdis, João M. P. Cardoso, Stamatis Vassiliadis, “Síntese de Expressões
Regulares em FPGAs: Estado Actual,” in
III Jornadas sobre Sistemas Reconfiguráveis (REC’07). 8 e 9 de Fevereiro de 2007, Instituto Superior Técnico, Lisboa,
Portugal.
Rui
Marcelino, Horácio Neto, João M. P. Cardoso, “On Implementing Sorting Network
Machines with FPGAs,” in III Jornadas
sobre Sistemas Reconfiguráveis (REC’07). 8 e 9 de
Fevereiro de 2007, Instituto Superior Técnico, Lisboa, Portugal.
José A. de
Holanda, Lírio O. B. de Almeida, Vanderlei Bonato, João M. P. Cardoso, Eduardo
Marques, “Determinação do Perfil de Consumo de Potência em Nível de
Instrução para Processadores Soft-core,” in III Jornadas sobre Sistemas Reconfiguráveis (REC’07), 8 e 9 de
Fevereiro de 2007, Instituto Superior Técnico, Lisboa, Portugal, pp. 60-65.
Rui
Rodrigues, Ricardo Ferreira, and João M. P. Cardoso, “Utilização da
Tecnologia XML no Desenvolvimento de Arquitecturas Específicas,” in XML Aplicações e Tecnologias Associadas
(XATA2006), Portalegre, Portugal, February 9-10, 2006.
Fábio Silva,
Milton Godinho e João M. P. Cardoso, “Sistema Implementado em FPGA para
Reconhecimento de Comandos baseados em Posturas de Mãos,” in REC2006, Jornadas sobre Sistemas
Reconfiguráveis, FEUP, Porto, Portugal, 16-17 Fevereiro 2006.
João Lima,
João M. P. Cardoso e Eduardo Marques, “Metodologia para Implementação de
Controladores PID em FPGAs,” in REC2006,
Jornadas sobre Sistemas Reconfiguráveis, FEUP, Porto, Portugal, 16-17
Fevereiro 2006.
Rui F. L.
Marcelino, e João M. P. Cardoso, “An Introduction to Commercial
Reconfigurable Processing Architectures,” in REC2006, Jornadas sobre Sistemas Reconfiguráveis, FEUP, Porto,
Portugal, 16-17 Fevereiro 2006.
Ricardo
Ferreira, João M. P. Cardoso, and Horácio C. Neto, “EDA: An Environment for
Exploring Data-Driven Architectures,” in Jornadas sobre Sistemas Reconfiguráveis (REC2005), Universidade do
Algarve, Algarve, February 21 2005, (extended version of the paper presented at
FPL03)
João M. P.
Cardoso, M. M. Fernandes, Vanderlei Bonato, E. D. V. Simões, Eduardo Marques, “Proposta
de um Ambiente para Codesign de Hardware/Software em Plataformas de FPGAs com
Aplicação em Robótica Móvel,” in Simpósio
Latino Americano em Aplicações de Lógica Programável e Processadores Digitais
de Sinais em Processamento de Vídeo, Visão Computacional e Robótica – SLALP’2004,
Departamento de Engenharia Elétrica, Escola de Engenharia de São Carlos – USP,
São Carlos - SP – Brasil, 8 a 10 de Novembro de 2004.
João M. P. Cardoso, and Horácio C. Neto, “Compilation of High-Level Languages
onto Fine-Grain FCCMs with Exploitation of Instruction-Level Parallelism,”
In Proc. of the 4th Portuguese Conference on Automatic Control (CONTROLO'2000),
4-6 October 2000, Guimaraes, Portugal, special
session MESC (Methodologies for the Engineering of Control Systems)
“Method and Device for
Partitioning Large Computer Programs,”
Patent Number: EP1470478, Publication date: 2004-10-27
Inventor(s): CARDOSO JOAO (DE); VORBACH MARTIN (DE);
WEINHARDT MARKUS (DE). Applicant(s):
PACT XPP TECHNOLOGIES AG (DE).
“Method for Processing Data”
Patent Number: US2004015899; Publication Date: 2004-01-22
Inventor(s):
MAY FRANK (DE); NUCKEL ARMIN (DE); VORBACH MARTIN (DE); WEINHARDT MARKUS (DE);
CARDOSO JOAO (PT)
“Method of Compilation”
Patent Number: US2005132344; Publication Date: 2005-06-16
Patent Number: WO03071418, Publication date: 2003-08-28
Inventor(s): Cardoso João (de); Vorbach Martin (de); Weinhardt Markus (de), applicant(s): Cardoso João (de); Vorbach Martin (de); PACT XPP Technologies AG (de); Weinhardt Markus (de).
“Data Processing Method,”
Patent Number: US2004243984; Publication date: 2004-12-02
Patent Number: EP1402382, Publication date: 2004-03-31
Inventor(s): MAY FRANK (DE);
NUECKEL ARMIN (DE); VORBACH MARTIN (DE); WEINHARDT MARKUS (DE); CARDOSO JOAO
MANUEL PAIVA (PT). Applicant(s):
PACT XPP TECHNOLOGIES AG (DE).
Patent Number: WO02103532, Publication date: 2002-12-27
Inventor(s):
May Frank (de); Nueckel Armin (de); Vorbach Martin (de); Weinhardt Markus (de); Cardoso Joao (pt).
Applicant(s): May Frank (de); Nueckel Armin (de); Vorbach Martin (de); PACT XPP Technologies AG (de);
Weinhardt Markus (de); Cardoso João (pt):
“Integrated cell matrix circuit
has at least 2 different types of cells with interconnection terminals positioned
to allow mixing of different cell types within matrix circuit”
Patent Number: DE10129237, Publication date: 2002-04-18, Inventor(s): May Frank
(de); Nueckel Armin (de); Vorbach
Martin (de); Weinhardt Markus (de); Cardoso João (pt), applicant(s): PACT Inf Tech Gmbh (de).
João M. P. Cardoso, “Compilation of JavaÔ
Algorithms onto Reconfigurable Computing Systems with Exploitation of
Operation-Level Parallelism,” Ph.D. Thesis (in Portuguese), IST,
Lisbon, October, 2000. [research adviser: Prof. Doutor
Horácio C. Neto]
João M. P. Cardoso, “Co-Synthesis of Embedded Systems onto Gate-Array
Technology,” Master Thesis (in Portuguese), IST, Lisbon, November,
1996. [research adviser: Prof. Doutor Horácio C. Neto]