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Dates
   Submission deadline
25 October 2013
Abstracts due Nov. 4, 2013
Papers due Nov. 11, 2013 (strict deadline)
   Author Notification
6 December 2013
9 December 2013
   Camera-Ready and Author Registration
3 January 2014
   Early Registration until
21 February 2014
   Late Registration after
21 February 2014
   Conference date
14-16 April 2014

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Remote FPGA Labs Special Session

These hands-on approach sessions are preceded by the two presentations to be given on Tuesday, April 15, Session T3-A, 15:50 - 17:10 (link).



April 17 (Thursday)


8:30 - 10:00

Fearghal Morgan
National University of Ireland
Galway

Title: Hands-on: Online Learning, Assessment and Prototyping of Digital Systems using Remote Reconfigurable Computing

Tutorial:

The goal of the tutorial is to enable each attendee to:

  1. Understand the principles of Vicilogic by following a short online directed learning and assessment lesson using remote FPGAs. The lesson will provide hands-on directed learning of combinational and sequential components, with animated block diagrams, timing diagrams, state machines and truth tables. A sandbox will enable user control and interaction with the lesson examples. Automatic assessment will capture user understanding.
  2. Build your own application and control/visualisation console using Vicilogic. Users can bring along their own VHDL-based project component example, captured and simulated using Xilinx EDA toolsuite (Vivado or PlanAhead) and associated diagrams graphically describing the design and/or its state machine(s). Each attendee will follow an automated process to wrap their VHDL design for execution on Vicilogic, generate a Vicilogic FPGA configuration file (using Xilinx tools installed on their laptop), upload the configuration file and design diagrams to Vicilogic, and build an animated console enabling real-time control and visualisation of the design executing on a remote FPGA.
  3. Build their own lesson using Vicilogic Users will apply the course builder to develop a short lesson which includes their project example.

Attendees should bring a laptop, with Xilinx Vivado or PlanAhead EDA tools installed and licensed. Wireless access and Vicilogic registration will be provided.

Contact [email protected] for further information.

Biography:

Fearghal Morgan leads the Bio-Inspired Electronics and Reconfigurable Computing Research Group, National University of Ireland Galway (NUI Galway). Fearghal has 20 years teaching and research experience and 7 years design industry experience. He holds a B.Sc. (Hons) and Ph.D. in Electrical and Electronic Engineering, Queen’s University Belfast (1981 and 1986).

Recent and current research projects include the Enterprise Ireland funded Vicilogic project, NUI Galway PI on the Si elegans FP7 project (http://www.si-elegans.eu/), and collaborator on the Science Foundation Ireland “Efficient Embedded DSP Research Cluster”.



10:00 - 10:30

Coffee-Break


10:30 - 12:30

Nele Mentens
Jochen Vandorpe
KU Leuven
Belgium

Title: eDiViDe: a remote learning platform for FPGA design

Tutorial:

The target audience of the workshop are professors and teaching/research assistants that are interested in using the platform for their courses/research. Both the use of the platform and the option to extend the platform with a new locally hosted, remotely connected setup are explained during the workshop. Company representatives that are interested in using the platform for training or recruitment purposes are also encouraged to participate in the workshop.

All participants are requested to bring their own laptop with a firefox or chrome browser.

Biography:

Nele Mentens obtained a Ph.D. in Engineering Science at KU Leuven in 2007. Her research interests are in the field of cryptographic coprocessors in secure embedded systems, dynamically reconfigurable hardware for security purposes, EDA for cryptographic hardware/software and remote FPGA labs. Currently, she is an assistant professor at KU Leuven, Campus Diepenbeek, where she founded the research group "Embedded Systems & Security" in 2008. Nele is also part of the COSIC group at KU Leuven.

Jochen Vandorpe obtained a Master degree in Industrial Engineering in 2005 at KU Leuven, Campus Diepenbeek. He spent 6 years in industry, working on mobile telecommunications products and networking solutions in mainly international environments. He joined the Embedded Systems & Security group at KU Leuven, Campus Diepenbeek in 2011, where he is responsible for the eDiViDe project.

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