Emerging Technologies and Circuit Synthesis
New technologies are emerging beyond CMOS to extend electronic systems with features unavailable to silicon-based devices. They provide new logic and interconnection structures for computation, storage and communication that may require radically new design paradigms, and therefore trigger the development of a new generation of design automation tools.
In the last decade, several emerging technologies have been proposed and the time has come for studying new ad-hoc techniques and tools for logic synthesis, physical design and testing from the architectural level down to RTL and cell libraries.
This special session addresses any aspect of new circuit synthesis techniques for emerging memories and logic devices, in particular:
- ambipolar technologies and EXOR-based circuits (e.g., silicon nanowires, carbon nanotubes and graphene devices);
- nano-devices based on state variables (e.g., spin, and spin-transfer devices for storage architectures);
- devices based on nonlinear hysteretic curves in the I/V plane, which can be modeled as memristors;
- other emerging technologies (e.g., paper circuits, synthetic biology).
The main focus is on:
- emerging circuit and system implementation technologies;
- logic synthesis for emerging technologies;
- design issues and challenges of circuit and system implementation with emerging technologies;
- physical synthesis for emerging technologies;
- testing and design validation for emerging technologies;
- experiments and designs with emerging technologies.
Authors are encouraged to submit their manuscripts to http://www.easychair.org/conferences/?conf=dsd2015. Should an unexpected web access problem be encountered, please contact the Program Chair by email (firstname.lastname@example.org).
Each manuscript should include the complete paper text, all illustrations, and references. The manuscript should conform to the IEEE format: single-spaced, double column, US letter page size, 10-point size Times Roman font, up to 8 pages. In order to conduct a blind review, no indication of the authors’ names should appear in the manuscript, references included.
CPS, Conference Publishing Services, publishes the DSD Proceedings (submitted for ISI indexing), submitted to the IEEE Xplore Digital Library. Extended versions of selected best papers will be published in a special issue of the ISI indexed “Microprocessors and Microsystems: Embedded Hardware Design” Elsevier journal.
Deadline for paper submission: April 12th, 2015 (EXTENDED)
Notification of acceptance: June 15th, 2015
Camera ready papers: June 29th, 2015
ETCS SESSION CHAIRS
Valentina Ciriani (University of Milano, IT)
Tiziano Villa (University of Verona, IT)
ETCS PROGRAM COMMITTEE
Luca Amarù (EPFL, CH)
Philip Brisk (UC Riverside, USA)
Douglas Michael Densmore (Boston University, US)
Masahiro Fujita (University of Tokyo, JP)
Marco Ottavi (Univ. of Roma Tor Vergata, IT)
Davide Pandini (ST Microelectronics, IT)
Massimo Poncino (Politecnico di Torino, IT)
Wenjing Rao (Univ. of Illinois at Chicago, US)
Sachin Sapatnekar (Univ. of Minnesota, US)
Chun-Yao Wang (National Tsing Hua Univ., TW)
University of Milano
Via Bramante, 65
26013 – Crema – CR – Italy
Tel.: +39 02 50330083
Fax.: +39 02 50330074
Department of Computer Science
University of Verona
strada le Grazie 15
37134 Verona, Italy