Keynotes

  • Chi-Foon Chan, President & co-CEO, Synopsys, Inc., United States (DSD Keynote)
  • Pernille Bjørn University of Copenhagen, Denmark (SEAA Keynote)
  • Aldo Dagnino, ABB Corproate Research Center, United States (SEAA Keynote)
  • João Cardoso University of Porto/FEUP/INESC-TEC, Portugal (DSD Keynote)
  • José Principe, University of Florida, United States (DSD Keynote)

 

ChiFoonChan
Chi-Foon Chan
President & co-CEO, Synopsys, Inc., United States
Hardware and Software: Collaborating to Meet New Challenges and Opportunities
Wednesday, August 26th
09:00 – 10:00
Room Funchal
Bio-sketch
As Synopsys’ co-CEO, Dr. Chi-Foon Chan shares responsibility for crafting vision and strategy, leading the company, and ensuring execution excellence in support of our customers’ success. As the company’s President and COO, a role Dr. Chan held for 14 years prior to his 2012 appointment to President and co-CEO, he guided internal operations and worldwide field organizations. Dr. Chan joined Synopsys in 1990 as Vice President of Applications and Services where he helped build the Technical Field organization. He has sponsored several key initiatives such as entering the IP market, and personally facilitated key acquisitions such as Avant!, Virage Logic, Magma Design Automation and SpringSoft. Most recently, he was involved in Synopsys’ entry into the software testing market with the acquisition of Coverity.
Prior to Synopsys, Dr. Chan contributed to industry leading companies like NEC Corporation, where he was General Manager of the microprocessor group, responsible for marketing all NEC chip devices in North America. Prior to NEC, Dr. Chan was an engineering manager at Intel Corporation.
Dr. Chan holds an M.S. and a Ph.D. in Computer Engineering from Case Western Reserve University; and a B.S. in Electrical Engineering from Rutgers University.
Abstract
The accelerated pace of technology is driving tremendous growth in new devices and applications, and technical innovation is the driving force in the world’s economy. New opportunities within the Internet of Things also introduce new risks, and finding ways to increase security is essential. These trends are leading into a decade of smart everything that will impact both technology and business models. In this era, the challenge for hardware and software designers has never been greater. The talk will explore the lessons that the hardware and software worlds can teach each other, and how the resulting momentum will enable faster, smarter and safer products that transform where we live and work.

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Pernille Bjørn
University of Copenhagen, Denmark
Global Software Development in a CSCW perspective: From Distance to Politics
Wednesday, August 26th
14:30 – 15:30
Room Funchal
Bio-sketch
Pernille Bjorn is Professor for CSCW at the Computer Science Department at the University of Copenhagen, Denmark.
Pernille’s main interest is to investigate how people collaborate within complex work arrangement aiming at developing concepts useful for the design of collaborative technologies – and her main research area is Computer Supported Cooperative Work (CSCW). She has conducted ethnographic studies of collaborative work practices in several domains such as healthcare, engineering, and software development. Currently her main interest is global software development, where she is responsible for the ethnographic studies in 5 different organisational setups with different industry partners, as part of the NexGSD research project, which is a 5 years research project on global software development funded by the Danish strategic research council.
Pernille’s research is in the cross-roads between CSCW, STS, CHI, and IS research. In December 2014 she published her first book: Sociomaterial-Design: Bounding Technologies in Practice in the Springer CSCW series. She has over 60 publications in peer-reviewed conference proceedings (e.g. CHI, CSCW, ECSCW) as well as in high-ranking journals such as the Journal of Computer Supported Cooperative Work, International Journal of Medical Informatics, Information System Journal, Action Research Journal, Science & Technology Studies, European Journal of Information Systems, Scandinavian Journal of Information Systems, and IEEE Transaction on Professional Communication.
Abstract
Software development today is done in collaborative situations, where clients, developers, managers, testers etc are located in different parts of the world, speaking different languages and living very different lives. Research into global software development is diverse; some are focusing on the processes and methods, others are focusing on the design of technology supporting the work – however few have investigated the basic nature of the collaborative work which emerges these settings. In this keynotes I will report from our ongoing interdisciplinary research project through the last 5 years investigating the Next Generation Tools and Processes for Global Software Development (nexgsd.org), and particular explore the journey which began with designing technologies for collaboration across distance to continue of a future path for designing technologies for collaboration across politics.

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Aldo Dagnino
ABB Corporate Research Center, United States
Measuring the Economic Benefits of Process Improvement in Software Development Organizations
Thursday, August 27th
09:00 – 10:00
Room Funchal
Bio-sketch
Dr. Aldo Dagnino has over 20 years experience in the software industry and he is currently leading the Software Architectures and Software Technologies Research Group at the US Corporate Research Center of ABB. Dr. Dagnino worked in the area of knowledge-intensive systems applied to manufacturing and robotics. Dr. Dagnino is currently leading the Industrial Analytics initiative at ABB Corporate Research. He is Adjunct Assistant Faculty Member in the Department of Computer Science at North Carolina State University where he conducts collaborative research with other Faculty Members and teaches graduate courses in Software Engineering. Dr. Dagnino was honored to receive the Software Engineering Institute Member Award Winner for most Outstanding Technical Contributor at the 2008 SEPG Conference in Tampa, FL.
Abstract
Software process improvement (SPI) has been the topic of many research studies in Software Engineering. Surprisingly, not much work seems to have been devoted to discuss how to evaluate the economic benefits of SPI initiatives in organizations. Often software practitioners believe that they cannot accurately determine the return on investment because they cannot quantify the benefits of software process improvement activities. The objective of SPI initiatives is to make the software development and maintenance activities more efficient, and it aims at improving the management and engineering capabilities in organizations, so that they can produce better products with the highest quality, on time and on budget. With the amount of attention focused on SPI initiatives and approaches, it is fair to think on how to measure the benefits of a SPI initiative. Measuring the economic benefits of SPI will help convince senior management to invest money and effort in SPI to either reduce costs, improve quality, or increase revenues. It is also important to quantitatively determine how to prioritize SPI activities and how much effort to put into the improvement initiative. In this presentation I will discuss the importance of measuring the economic benefits of SPI initiatives and also present a framework used at ABB to evaluate the economic benefits of software process improvement activities. This talk will elaborate on how to tightly integrate selected organization’s business objectives to SPI, and the framework discussed will show how SPI activities can be prioritized and how a ROI can be derived.

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Cardoso
João Cardoso
University of Porto/FEUP/INESC-TEC, Portugal
Compiling to FPGAs: How much progress? How much can we expect? The challenges ahead
Thursday, August 27th
14:30 – 15:30
Room Funchal
Bio-sketch
João M. P. Cardoso received a 5-year Electronics Engineering degree from the University of Aveiro in 1993, and an MSc and a PhD degree in Electrical and Computer Engineering from the IST/UTL (Technical University of Lisbon), Lisbon, Portugal in 1997 and 2001, respectively. He is currently Associate Professor at the Department of Informatics Engineering, Faculty of Engineering of the University of Porto, Porto, Portugal and a research member of INESC TEC. Before, he was with the IST/UTL (2006-2008), a senior researcher at INESC-ID (2001-2009), and with the University of Algarve (1993-2006). In 2001/2002, he worked for PACT XPP Technologies, Inc., Munich, Germany. He has participated in the organization of various international conferences. He was General Chair of FPL’2013, General Co-Chair of ARC’2014 and ARC’2006, Program Co-Chair of RAW’2010, and Program Co-Chair of DASIP’2014. He served as a Program Committee member for many international conferences. He is co-author of one Springer book and co-editor of two Springer Books and three Springer LNCS volumes. He has (co-)authored over 150 scientific publications (including journal/conference papers and patents) on subjects related to compilers, embedded systems, and reconfigurable computing. He has participated in a number of research projects: as co-scientific coordinator of the FP7 project REFLECT (2010-2012), and as coordinator of a number of national funded projects. He is a member of IEEE, IEEE Computer Society and a senior member of ACM. His research interests include compilation techniques, domain-specific languages, reconfigurable computing, application-specific architectures, and high-performance embedded computing.
Abstract
Reconfigurable fabrics, especially FPGAs, have become very sophisticated and complex computing platforms. Their customization facilities, large scale computing power, heterogeneity, and reconfigurability provide the special ingredients to make them computing platforms of choice. They are being adopted in many application areas with strictly requirements, from high-performance to embedded computing. FPGAs are able to provide hardware acceleration to algorithms and complete system solutions with low cost and efficient performance/energy tradeoffs. However, the way we program FPGAs, and specially the required expertize and low-level knowledge, continues to be a drawback with growing proportions. Some more skeptical may argue that the kind of breakthrough provided by RTL/logic synthesis has not yet been seen in the automatic mapping of algorithms and data structures to reconfigurable fabrics! The complexity of the applications and the hardware capacity of reconfigurable fabrics are starving for advancements over the common use of high-level synthesis tools to map computations from software programming languages to FPGAs. The compilation of high-level programming languages to hardware started in the 80’s and embraces more than twenty years of research efforts. Some limitations seem to hamper its main stream adoption. Over recent years, however, we have seen new and renewed approaches to map computations to FPGAs, from C, OpenCL and other DSLs (Domain-Specific Languages). It is both a stimulating and challenging moment! This presentation will start by an historical perspective about the compilation of software programming languages to reconfigurable hardware (e.g., provided by FPGAs). The presentation will focus on the improvements over the last decade, the trends, and the challenges. We will highlight recent achievements and our approaches aimed at solving one of the most critical and difficult compilation problems: automatic code restructuring.

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August 28th

Principe
José Principe
University of Florida, United States
Ultra Low-Power Pulse Based Signal Processing
Friday, August 28th
09:00 – 10:00
Room Funchal
Bio-sketch
Jose C. Principe (M’83-SM’90-F’00) is a Distinguished Professor of Electrical and Computer Engineering and Biomedical Engineering at the University of Florida where he teaches advanced signal processing, machine learning and artificial neural networks (ANNs) modeling. He is BellSouth Professor and the Founder and Director of the University of Florida Computational NeuroEngineering Laboratory (CNEL) www.cnel.ufl.edu. His primary area of interest is processing of time varying signals with adaptive neural models. The CNEL Lab has been studying signal and pattern recognition principles based on information theoretic criteria (entropy and mutual information).
Dr. Principe is an IEEE Fellow. He was the past Chair of the Technical Committee on Neural Networks of the IEEE Signal Processing Society, Past-President of the International Neural Network Society, and Past-Editor in Chief of the IEEE Transactions on Biomedical Engineering. He is a member of the Advisory Board of the University of Florida Brain Institute. Dr. Principe has more than 600 publications. He directed 81 Ph.D. dissertations and 65 Master theses. He wrote in 2000 an interactive electronic book entitled “Neural and Adaptive Systems” published by John Wiley and Sons and more recently co-authored several books on “Brain Machine Interface Engineering” Morgan and Claypool, “Information Theoretic Learning”, Springer, and “Kernel Adaptive Filtering”, Wiley.
Abstract
Numeric computation is at the core of man-made computation models. However, the human brain very likely does not use the same principles. This talk describes my efforts to think out of the box and look for alternate methods to perform computation with man-made devices. After a brief introduction we present the integrate-and-fire converter and show that one can convert analog signals into pulse trains with properties very similar to Nyquist sampling (a one to one mapping with a unique inverse). If so, how do we compute directly with pulse trains? We show that one approach is to implement finite state machines with attribute grammars, which require just 1,000 gates. I also will show how automata can be learned directly from the input pulse train using recurrent kernel filters. Preliminary results are presented.

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