aol.bib

@inproceedings{SILVA_REC_2011,
  author = {Silva, L. and Oliveira, A. and Pedreiras, P. and Santos, R.},
  title = {Liga\c{c}\~{a}o de Alto Desempenho entre FPGAs para Switch Ethernet FTT},
  booktitle = {VII Jornadas sobre Sistemas Reconfigur\'{a}veis (REC'2011) Proceedings},
  year = {2011},
  editor = {},
  volume = {},
  series = {},
  pages = {},
  address = {Oporto, Portugal},
  month = {February},
  organization = {},
  publisher = {},
  doi = {},
  issn = {},
  isbn = {},
  keywords = {FTT, Ethernet, Switch, FPGA, Real-Time communications, HaRTES},
  note = {},
  key = {},
  abstract = {A Ethernet como de?nida na norma IEEE 802.3 n\~{a}o \'{e} adequada a aplica\c{c}\~{o}es tempo-real. Apesar de terem surgido v\'{a}rios protocolos que tornam poss\'{i}vel a sua aplica\c{c}\~{a}o em sistemas de tempo-real, as garantias oferecidas s\~{a}o em geral est\'{a}ticas e pouco ?ex\'{i}veis. O projecto HaRTES tem como objectivo o desenvolvimento de um switch Fast Ethernet com recurso a tecnologia FPGA, capaz de fornecer servic?os de comunica\c{c}\~{a}o tempo-real com garantias din\^{a}micas de qualidade de servi\c{c}o. No entanto, os recursos oferecidos pelas FPGAs e placas de desenvolvimento actuais sao limitados para este tipo de projecto, di?cultando a escalabilidade do switch em diversos aspectos (e.g. numero de portos). O presente artigo discute o desenvolvimento de uma liga\c{c}\~{a}o s\'{e}rie multi-gigabit entre FPGAs que constituem o switch, com vista a minorar as limita\c{c}\~{o}es de escalabilidade no projecto do switch HaRTES}
}
@inproceedings{SANTOS_WFCS_2010,
  author = {Santos, R. and Vieira, A. and Pedreiras, P. and Oliveira, A. and Almeida, L. and Marau, R. and Nolte, T.},
  title = {Flexible, efficient and robust real-time communication with server-based Ethernet Switching},
  booktitle = {8th IEEE International Workshop on Factory Communication Systems (WFCS'2010) Proceedings},
  year = {2010},
  editor = {},
  volume = {},
  series = {},
  pages = {131--140},
  address = {Nancy, France},
  month = {May},
  organization = {},
  publisher = {},
  doi = {10.1109/WFCS.2010.5548632},
  issn = {},
  isbn = {978-1-4244-5462-4},
  keywords = {Ethernet, FTT, FTT-SE, Real-Time communications, Switch, Embedded system, Ethernet networks, Protocols, Real time systems, Robustness, Throughput},
  note = {},
  key = {},
  abstract = {The information exchanged in Networked Embedded Systems is steadily increasing in quantity, size, complexity and heterogeneity, with growing requirements for arbitrary arrival patterns and guaranteed QoS. One of the networking protocols that is becoming more common in such systems is Ethernet and its real-time Ethernet variants. However, they hardly support all the referred requirements in an efficient manner since they either favour determinism or throughput, but not both. A potential solution recently proposed by the authors is the Server-SE protocol that uses servers to confine traffic associated to specific applications or subsystems. Such an approach is dynamically reconfigurable and adaptive, being more bandwidth efficient while providing composability in the time domain. This paper proposes integrating the servers inside the Ethernet switch, boosting both the flexibility and the robustness of Server-SE, allowing, for example, the seamless connection of any Ethernet node. The switch is an FTT-enabled Ethernet Switch and the paper discusses two specific ways of integrating the servers, namely in software or in hardware. These options are described and compared analytically and experimentally. The former favours flexibility in the servers design and management while the latter provides lower latency}
}
@inproceedings{SANTOS_WARM_2010,
  author = {Santos, R. and Vieira, A. and Marau, R. and Pedreiras, P. and Oliveira, A. and Almeida, L. and Nolte, T.},
  title = {Improving the efficiency of Ethernet switches for real-time communication},
  booktitle = {1st International Workshop on Adaptive Resource Management (WARM'2010) Proceedings},
  year = {2010},
  editor = {},
  volume = {},
  series = {},
  pages = {},
  address = {Stockholm, Sweden},
  month = {April},
  organization = {},
  publisher = {},
  doi = {},
  issn = {},
  isbn = {},
  keywords = {Ethernet, Switch, Real-Time Communications},
  note = {},
  key = {},
  abstract = {}
}
@inproceedings{SANTOS_REC_2010,
  author = {Santos, R. and Vieira, A. and Marau, R. and Pedreiras, P. and Oliveira, A. and Almeida, L.},
  title = {Architectural Solutions for Server Scheduling Communication within Ethernet Switches},
  booktitle = {6th Jornadas sobre Sistemas Reconfigur\'{a}veis (REC'2010) Proceedings},
  year = {2010},
  editor = {},
  volume = {},
  series = {},
  pages = {},
  address = {Aveiro, Portugal},
  month = {February},
  organization = {},
  publisher = {},
  doi = {},
  issn = {},
  isbn = {},
  keywords = {Embedded Systems, NES, FTT, Ethernet, Switch, quality of service},
  note = {},
  key = {},
  abstract = {The information exchanged in Network Embedded Systems (NES) is steadily increasing both in terms of quantity, size and complexity. For instance, applications comprising data originated in simple 10 bit ADCs side-by-side with multi-kilobyte variable bit-rate multimedia traffic are, nowadays, becoming a commonplace. Moreover, many NES are frequently subject to some kind of real-time constraints and thus the associated information exchanges are subject to timeliness requirements. However, the existing real-time Ethernet protocols have difficulties in handling these streams efficiently, particularly in what regards the arbitrary arrival patterns and different QoS requirements. To overcome these limitations, the authors proposed recently the integration of server-based traffic scheduling concepts within a customizable Ethernet switch, called FTT-enabled switch. The server scheduling unit can be placed in different points of the FTT-enabled switch architecture. The particular placement chosen has a noticeable impact in terms of server responsiveness, flexibility, hardware complexity and global system schedulability. This paper presents a qualitative comparison about the different architectural solutions and presents a prototype implementation of the hardware-based architecture. Extensive experimental results are also included, showing the correctness of the server operation both in terms of bandwidth guarantees, traffic isolation and latency bounds}
}
@inproceedings{SANTOS_CRTS_2009,
  author = {Santos, R. and Vieira, A. and Marau, R. and Pedreiras, P. and Oliveira, A. and Almeida, L. and Nolte, T.},
  title = {Implementing Server-Based Communication within Ethernet Switches},
  booktitle = {2nd Workshop on Compositional Theory and Technology for Real-Time Embedded Systems (CRTS'2009) Proceedings},
  year = {2009},
  editor = {},
  volume = {},
  series = {},
  pages = {},
  address = {Washington, USA},
  month = {December},
  organization = {},
  publisher = {},
  doi = {},
  issn = {},
  isbn = {},
  keywords = {Real-Time communications, FTT, FTT-SE, Ethernet, Switch},
  note = {},
  key = {},
  abstract = {Server-based architectures have generated recently a considerable interest. They provide an effective means to support composability, i.e., the integration of diverse components while guaranteeing the required service-levels to each one. While common in CPU scheduling, the support for server-oriented architectures in the domain of real-time communication protocols is more limited due to distribution and specific medium access control and queues management policies within network controllers, network devices and protocol stacks. Consequently, server-based traffic scheduling is either not supported or supported in a limited and inefficient way, e.g., only basic servers, no hierarchical composition, static configuration. To overcome such limitations, the authors proposed recently the Server-SE protocol, which supports unconstrained server-based traffic scheduling over switched Ethernet, using the FTT-SE protocol and common off-the-shelf (COTS) switches as platform. This paper extends such work by bringing the servers inside a customized Ethernet switch. This option provides a high level of determinism, robustness and flexibility, being particularly suited to open systems as servers can easily be added, composed, adapted and removed at run-time. The proposal is validated with a prototype implementation and experimental results that show its effectiveness in enforcing correct resource reservations}
}
@inproceedings{SANTOS_IECON_2009,
  author = {Santos, R. and Marau, R. and Vieira, A. and Pedreiras, P. and Oliveira, A. and Almeida, L.},
  title = {A synthesizable ethernet switch with enhanced real-time features},
  booktitle = {35th Annual Conference of IEEE Industrial Electronics (IECON'2009) Proceedings},
  year = {2009},
  editor = {},
  volume = {},
  series = {},
  pages = {2817--2824},
  address = {Oporto, Portugal},
  month = {November},
  organization = {},
  publisher = {},
  doi = {10.1109/IECON.2009.5415405},
  issn = {1553-572X},
  isbn = {978-1-4244-4650-6},
  keywords = {FTT, Ethernet, Real-Time communications, Computer architecture, Ethernet networks, Field programmable gate arrays, Hardware, Protocols, Prototypes, Substation protection, Switches},
  note = {},
  key = {},
  abstract = {The use of switched Ethernet for safe real-time communication still suffers from undesired phenomena, such as blocking caused by long non-preemptive frames, lack of protection against errors in the time domain, couplings across virtual LANs and priority levels via internal switch shared resources. Recently, a few solutions were proposed to cope with such phenomena. One such solution is based on an enhanced switch following the Flexible Time-Triggered paradigm, which enforces strict service differentiation with any kind of traffic scheduling, blocking-free forwarding and timing errors confinement. In this paper we propose a new architecture following an hardware-software co-design approach that simplifies the development of the enhanced switch features by detaching the traffic scheduling from the traffic switching. The paper shows experimental results with an actual switch prototype that confirm the desired switch properties}
}
@inproceedings{SANTOS_REC_2009,
  author = {Santos, R. and Marau, R. and Oliveira, A. and Pedreiras, P. and Almeida, L.},
  title = {FPGA-based Implementation of an Ethernet Switch for Real-Time Applications},
  booktitle = {5th Jornadas sobre Sistemas Reconfigur\'{a}veis (REC'2009) Proceedings},
  year = {2009},
  editor = {},
  volume = {},
  series = {},
  pages = {},
  address = {Monte de Caparica, Portugal},
  month = {February},
  organization = {},
  publisher = {},
  doi = {},
  issn = {},
  isbn = {},
  keywords = {Ethernet, Switch, Real-Time communications},
  note = {},
  key = {},
  abstract = {The use of switched Ethernet for precise and safe real-time communication still suffers from undesired phenomena, such as blocking caused by long non-preemptive frames, lack of protection against errors in the time domain, couplings across virtual LANs and priority levels via internal switch shared resources. Recently, a few solutions were proposed to cope with such phenomena. One such solution is based on an enhanced switch following the Flexible Time-Triggered paradigm, which enforces strict service differentiation, blocking-free forwarding and timing errors confinement. In this paper we propose a new architecture following an hardware-software co-design approach that facilitates the development of the enhanced switch features by separating the traffic scheduling from the common management activities associated to switching}
}
@inproceedings{SANTOS_WFCS_2008,
  author = {Santos, R. and Marau, R. and Oliveira, A. and Pedreiras, P. and Almeida, L.},
  title = {Designing a costumized Ethernet switch for safe hard real-time communication},
  booktitle = {7th IEEE International Workshop on Factory Communication Systems (WFCS'2008) Proceedings},
  year = {2008},
  editor = {},
  volume = {},
  series = {},
  pages = {169--177},
  address = {Dresden, Germany},
  month = {May},
  organization = {},
  publisher = {},
  doi = {10.1109/WFCS.2008.4638737},
  issn = {},
  isbn = {},
  keywords = {FPGA, Ethernet, Real-Time communications, FTT, Switch},
  note = {},
  key = {},
  abstract = {The use of switched Ethernet for precise and safe real-time communication still suffers from undesired phenomena that range from the blocking caused by long non-preemptive frames to lack of protection against errors in the time domain and also couplings across virtual LANs and even priority levels via internal switch shared resources. In this paper we propose a novel switch architecture enhanced with resource reservation mechanisms, based on the Flexible Time-Triggered paradigm, which enforces strict service differentiation, blocking-free forwarding and timing errors confinement. Experimental results of a preliminary 4-port prototype based on an FPGA validate the desired properties and exhibit the potential of the enhanced Ethernet switch}
}