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Call for Papers
Areas of interest include but are
not limited to:
• Tester architecture and circuitry to provide and
support high-speed analog signal sourcing/generation
and response capture/sampling
• Embedded and external (hybrid) schemes and circuits for sourcing and
capturing high speed signals
• Low bandwidth/Low-cost testing/testers of GHz/Gpbs circuits
• BIT/BIST for GHz/Gbps circuits
• Passive and active loopback testing
• Jitter generation and analysis techniques, using embedded, external,
and hybrid circuitry
• Driving and measuring specifications of I/Os with differential
signaling
• High-speed/multi-channel test problems and solutions (test fixturing,
noise, signal integrity etc)
• On-chip infrastructure IP for accurate on-chip timing, voltage, and
current measurements
• Noise modeling and characterization of channels, cabling, sources,
receivers, etc.
• Device interface circuitry, and tradeoffs in accuracy and bandwidth
• Tradeoffs between yield, ATE overall timing accuracy (OTA), test
environment specifications, and I/O
timing specifications
• DFT and design for manufacturing (DFM) of Gbit/s I/Os
• High-speed I/O test power management
• Test stimulus and response data transfer and processing for go/no-go
testing and diagnosis
Authors information
Prospective authors are invited to submit extended
abstracts (1,000 words) or full papers (including an abstract of 50
words). Each submission should include: title, full name and
affiliation of all authors, and keywords. Also, identify a contact
author and include a complete correspondence address, phone number, fax
number, and e-mail address. All submissions are to be made
electronically through the GTW'07 website.. Proposals for panel
discussions are also invited.
Key Dates
Submission deadline_ March 25th, 2007
Notification of acceptance_ April 6th, 2007
Camera-ready full papers_ May 6th, 2007
Download
'Call for Papers'
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