Technical Program

A high-quality program, built from the contributions submitted to both GTW and IMSTW, has been prepared. This joint program comprises seven regular and two poster sessions, with a total of  thirty five presentations, covering the areas of analogue, mixed-signal, RF, high-speed IO, MEMS, and board test. Three invited key-note speeches will address the critical test topics of using analogue approaches for testing low-power digital IC’s, GHz/Gbps testing, and the challenges of MEMS testing.

Panel session: "Test limits in a microvolt, nanometer, picosecond world"
Organizers: Stephen Sunter, Abhijit Chatterjee
Moderator: Stephen Sunter
Panelists: David Keezer, Bozena Kaminska, Jacob Abraham

Abstract: Are we approaching the practical or meaningful limits to production testable performance?  Traditionally, test capability is required to be an order of magnitude better than the performance being tested.  As thermal noise, EMI, wire bandwidth, and process variability increasingly impair testability, can we test adequately and economically?  An IC's performance beyond 5 GHz, 5 Gbps, 16-bit quantization, or 90 nm can vary greatly in a system compared to its ATE-verified performance.  Will IC performance become too dependent on the system?  What is the right balance between test simplicity and fault coverage for these circuits?  Is picosecond or microvolt accuracy necessary for testing?  Are designs good enough that such detailed parametric testing can be avoided, or do manufacturers ignore performance variability because it depends on many aspects of a system (and test equipment) and errors can't be traced to one device?  If a picosecond or microvolt matters, then perhaps testing is not the place to detect it, and the system should be designed to tolerate this inaccuracy inherently. 

Advance Program (.pdf)


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