Relatório ESPRIT D4.1:

Sumário:

This document describes the test pattern generation (TPG) methodology for boards loaded exclusively with BST components. A domain definition is presented in first place, followed by a discussion of the constraints leading to the definition of the adopted fault model.
The various problems affecting fault diagnosis are exemplified and their influence on the TPG algorithms is outlined.
An overview of TPG algorithms for interconnect fault detection and diagnosis is then presented. Their complexity and relative merits concerning diagnostic accuracy are discussed. Test application times for a typical F-BST board are also considered. The choice of a TPG algorithm to use within the scope of this work is finally made and a formal specification for all its various steps is presented.

Índice:

1 – INTRODUCTION

Domain definition
    The BST methodology – advantages and disadvantages
    Characteristics of a typical F-BST board
    TPG methodology within a hierarchical F-BST environment
    Nets with multiple driving pins
    F-BST: Test protocol
Terminology
    A representation scheme for nets and test patterns
    Classification of test patterns and fault syndromes
    Fault detection versus fault diagnosis
Description of the adopted fault model

2 – TPG AND FAULT DIAGNOSIS

TPG for interconnect testing
Short fault diagnosis

3 – OVERVIEW OF TPG ALGORITHMS (FOR F-BST BOARDS INTERCONNECT TESTING)

The difference between one-step and adaptive algorithms
Description of algorithms
    Straight binary search algorithm
        TPG procedure
        Example
        Diagnostic capabilities
        General comments
    Enhanced binary search algorithm
        TPG procedure
        Example
        Diagnostic capabilities
        General comments
    Enhanced binary search and complement algorithm
        TPG procedure
        Example
        Diagnostic capabilities
        General comments
    Walking sequence algorithm
        TPG procedure
        Example
        Diagnostic capabilities
        General comments
    Minimum weight algorithm
        TPG procedure
        Example
        Diagnostic capabilities
        General comments
    Maximum independence algorithm
        TPG procedure
        Example
        Diagnostic capabilities
        General comments
    Goel and McMahon adaptive algorithm
        TPG procedure
        Example
        Diagnostic capabilities
        General comments
    One-test adaptive algorithm
        TPG procedure
        Example
        Diagnostic capabilities
        General comments
    Optimal C-test adaptive algorithm
        TPG procedure
        Example
        Diagnostic capabilities
        General comments

4 – CHOICE OF A TPG ALGORITHM (FOR F-BAT BOARDS INTERCONNECT TESTING)

Short form comparison of the described TPG algorithms
Choice of a TPG algorithm
Optimal C-test adaptive algorithm – a formal specification
    Outline of a data structure for describing nets
    Specification of the various steps
        The number of PTVs to be generated
        Initialisation for stuck-at / open detection and diagnosis and for short detection
        TPG for detection and diagnosis of stuck-at and open faults
        TPG for detection of short faults
        Initialisation for short faults diagnosis
        TPG for diagnosis of short faults
CONCLUSION

APPENDIX A: An in-depth analysis of the maximum independence algorithm 

REFERENCES