[previous] [next] [contents]    Full BST interconnect testing with multiple BS chains

Open fault detection in boards with multiple BS chains can be done sequentially or simultaneously in each chain, since each open fault does not affect more than one interconnect. A different situation takes place when considering short-circuit faults, since their detection requires the two shorted interconnects to be active (and with opposite logic values applied) at the same time. The binary partition algorithm presented in the previous section guarantees this condition, but further attention has to be given to the case of boards with multiple BS chains, since it is not possible to ignore the case of two interconnects belonging to different chains.

The binary partition algorithm will generate the test vectors for the whole group of interconnects in the board, regardless of how many BS chains exist or of what particular BS chain(s) each interconnect belongs to. However, the application of test vectors in each chain has to be done in a co-ordinated manner, through a protocol that may be described as follows for each vector:

  • For the first BS chain, shift the new vector in through the BS register cells and proceed to the update-DR and select-DR TAP controller states after the last bit is shifted in.
  • Repeat the previous operation with all remaining BS chains. The necessary conditions to detect all short-circuit faults detectable with this test vector will only be set when all BS chains have gone through the update-DR state.
  • Again in the first BS chain, capture the test vector responses present at the BS cell parallel inputs. Since the TAP controller of each IC was left in the Select-DR state, applying one TCK cycle with TMS=0 brings the TAP controller to Capture-DR, where the falling edge of TCK will trigger the capture operation. 
  • Repeat the previous operation will all remaining BS chains. Capturing the test vector responses will only be complete when this step is concluded for the last BS chain.

This test protocol for boards with multiple BS chains guarantees correct application of the test vectors generated by the binary partition or by any other test vector generation algorithm.