The detection of open or short-circuit faults with
1149.4 is similar as with 1149.1 and may be summarised as follows:
- In the case of digital pins, the data is loaded directly into the
DBMs
- In the case of analog pins, the control codes that cause internally
generated voltages (VH or VL) to be applied to
the pins are loaded into the ABMs
- Test vector application and response capturing starts with the
SAMPLE / PRELOAD instruction to shift in the first test vector and
deals only with digital data (both for digital and analog pins)
It is particularly important to emphasise the fact that
interconnect testing uses only digital test vectors, even for analog pins,
and is based exactly in the same algorithms used for digital-only
circuits, since:
- The high (VH) and low (VL) voltages applied to
analog function pins are generated internally
- VH or VL are applied to the analog output pins
as defined by the data shifted into the control structure of the ABMs
- The responses present at each analog input pin are converted to
digital through the comparator present in the switching structure of
the ABMs and read into the DATA bit in the capture / shift stage of
the ABMs control structure
Notice also that interconnect testing does not use the
ATAP pins, which are only necessary when analog signals are to be applied
or captured (and namely in parametric testing), as will be shown in the
following section. |