[previous] [next] [contents]    TBIC switching structure

The standard defines 10 switching patterns for the TBIC (among the 1.024 possible combinations), where each pattern represents a valid combination of switch conditions. These 10 patterns are presented in table 1 below, together with a short description of the corresponding operating modes. 

Pattern

Switch conditions

Connections and functions

1

2

3

4

5

6

7

8

9

10

P0

0

0

0

0

0

0

0

0

1

1

AB1/2 disconnected from AT1/2 and clamped. Mission mode, BYPASS, S/P, HIGHZ, IDCODE, USERCODE. Also high-Z in EXTEST.

P1

0

0

0

0

0

1

0

0

1

0

AB1 connected to AT1 and/or AB2 connected to AT2; disconnected bus clamped. PROBE, INTEST. Extended interconnect testing in EXTEST.

P2

0

0

0

0

1

0

0

0

0

1

P3

0

0

0

0

1

1

0

0

0

0

P4

0

0

1

1

0

0

0

0

1

1

AT1/2 = 00

Logic signals applied to AT1/2. Internal buses clamped. Simple interconnect testing (EXTEST).

P5

0

1

1

0

0

0

0

0

1

1

AT1/2 = 01

P6

1

0

0

1

0

0

0

0

1

1

AT1/2 = 10

P7

1

1

0

0

0

0

0

0

1

1

AT1/2 = 11

P8

0

0

0

0

0

1

1

0

1

0

AT1 connected to At2 via internal buses. Characterisation (in EXTEST).

P9

0

0

0

0

1

0

0

1

0

1

Table 1: TBIC – Switching structure patterns.

The main testing conditions are represented by switching patterns P1 to P3, which connect at least one of the ATAP pins to the internal analog test bus lines (P1 or P2 will clamp the ATAP pin not connected to the internal test bus). Figure 1 shows the effect of switching pattern P1, meant to support observability-only operations.

Figure 1: Connections established by P1.

The selection of each switching pattern is a function of the 4-bit code word shifted into the TBIC control structure (to be presented shortly ahead) and of the current instruction, as described in table 2.

 

Code Ca / Co / D1 / D2

Instruction

Code Ca / Co / D1 / D2

Instruction

EXTEST, CLAMP, RUNBIST

PROBE, INTEST

EXTEST, CLAMP, RUNBIST

PROBE, INTEST

0000

P0

P0

1000

P0

*

0001

P1

P1

1001

P8

*

0010

P2

P2

1010

P9

*

0011

P3

P3

1011

*

*

0100

P4

*

1100

*

*

0101

P5

*

1101

*

*

0110

P6

*

1110

*

*

0111

P7

*

1111

*

*

Table 2: TBIC – Switching assignments for defined instructions.

(an asterisk indicates a code word / instruction combination for which the current version of the standard does not define any specific operating mode)

Notice that the same 4-bit code word may lead to different operating modes, according to the contents of the instruction register. Figure 2 shows the operating mode defined for the TBIC switching structure, when the 4-bit code word is 0101 and the current instruction is EXTEST, CLAMP or BYPASS. However, if the current instruction is PROBE or INTEST, the operating mode of the switching structure is not defined by the current version of the standard.