PTThursday, 3 February 2011
| 08:45 | Registration |
| 09:15 | Opening session |
| 09:30 | Invited
presentation
Session chair: Mário Véstias
Zlatko Petrov
Honeywell
|
| 10:30 | Coffee break |
| 11:00 |
Regular session: DSP and
telecommunications
Session chair: Luís Gomes
Efficient and Programmable Processing Unit
for H.264/AVC Systolic Unified Transform
Engines
(long paper)
Tiago Dias, Nuno Roma, Sebastian López,
Leonel Sousa
INESC–ID,IST,ISEL,IUMA–ULPGC
High-Speed Viterbi Decoder for MB-OFDM
(long paper)
Mário Véstias
INESC-ID/ISEL/IPL
Projecto e Implementação de um Processador Elementar de
Imagens
(long paper)
Sérgio Paiágua, Mário Véstias, Horácio Neto
INESC-ID/IST/UTL, INESC-ID/ISEL/IPL
Linux Based Ethernet Communication for Xilinx FPGAs
(short paper)
Rodrigo Souza, Golberi Ferreira, André Fidalgo
IFSC, ISEP
Validation of a Flexible FPGA-based LDPC Decoder Through
Hardware-Software Co-simulation
(short paper)
Nelson Silva, Arnaldo Oliveira, Nuno Carvalho
Univ. Aveiro - DETI /IT
Ligação de Alto Desempenho entre FPGAs para
Switch Ethernet FTT
(short paper)
Luis Silva, Arnaldo Oliveira, Paulo
Pedreiras e Rui Santos
Univ. Aveiro - DETI/IT/IEETA
|
| 12:45 | Lunch |
| 14:00 | Invited
presentation
Session chair: Horácio Neto
Davide Pereira
Synopsys Portugal
|
| 15:00 | Regular session:
Languages and algorithms
Session chair: Helena Sarmento
Cofi: A CFG to FSMD Programming Language and Tool
(long paper)
Alfredo Silvestre, João Cardoso
FEUP
Improving Run-Time Creation of Partial FPGA Configurations
(long paper)
Miguel Silva, João Canas Ferreira
FEUP, INESC Porto
Node-Depth Encoding in FPGA applied to Large-Scale Network
Design
(short paper)
Marcilyanne Gois, Paulo Matias,Vanderlei Bonato,
Alexandre Delbem
Univ. of São Paulo (Brasil)
|
| 15:45 | Coffe break |
| 16:15 | Invited
presentation
Session chair: João Cardoso
Michael Hübner
ITIV, Karlsruhe Institute of Technology
|
| 17:15 |
Regular session: Instrumentation and
control
Session chair: Arnaldo Oliveira
Projecto e Implementação de um Analisador de Espectros
numa FPGA de Baixo Custo
(long paper)
Hugo Rebelo, Renato Costa, Luís Reis, Alessandro Floris,
Mário Véstias
ISEL, INESC-ID/ISEL/IPL
Gerador de impulsos de alta tensão controlado por FPGA com
interface gráfica e sistema de monitorização integrado
(long paper)
Fernando Pereira, Luís Gomes, Luís Redondo
ISEL, FCT/UNL, UNINOVA
A Reconfigurable Controller and a Fast Analogue Front-end
for a Didactic Positron Emission Tomography
Apparatus
(long paper)
Joel Silva, Rute Pedro, Luís Gurriana, José Silva, Amélia
Maio, José Soares Augusto
CFNUL-FCUL,LIP,FCUL,INESC-ID
A Comparison of Look-up Table Based Sine Wave Generation Implementations
(short paper)
Antonio Salazar, Ganga Bahubalindruno, Govinda Locharla,
Helio Mendonça, José Carlos Alves, José Machado da Silva
INESC Porto, GMRIT
A Remote FPGA Laboratory for Digital Design Students
(short paper)
João Soares, Jorge Lobo
ISR, Univ. of Coimbra
|
| 18:45 | Closing of the first day |
| 20:00 | Dinner |
