Short Program
Thursday, 3 February 2011
Full program...
Friday, 4 February 2011
09:00 |
Regular session: Architectures
and circuits I |
10:00 |
Invited
presentation: FPGAs in
Aerospace Applications |
11:00 |
Coffee break |
11:30 |
Regular session:
Architectures and circuits II |
12:50 |
FPGA design contest results |
13:05 |
Closing session |
13:15 |
Lunch |
Full program...
Invited presentations
The meeting features four invited presentations
about research projects and industrial applications
that exploit FPGAs and reconfigurable systems.
1. Rendering FPGAs to
Multi-Core Embedded Computing
Speaker: Zlatko Petrov Honeywell
Aerospace Advanced Technology Europe, Czech
Republic
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This talk will give an overview of the proposed
aspect-oriented design flow, that is a subject
of research and evaluation in the REFLECT FP7
project.
The REFLECT project will develop, implement and
evaluate a novel compilation and synthesis system
approach for FPGA-based platforms. REFLECT relies
on Aspect-Oriented (AO) Specifications to convey
critical domain knowledge to a mapping engine
while preserving the advantages of a high-level
imperative programming paradigm in early software
development. REFLECT leverages AO specifications
and a set of transformations to generate an
intermediate representation using an extensible
mapping language (LARA). LARA specifications will
allow the exploration of alternative architectures
and run-time adaptive strategies enabling the
generation of flexible hardware cores that can be
easily incorporated into larger multi-core
designs. An evaluation of the effectiveness of the
proposed approach using partner-provided codes
from the domain of audio/video processing and
real-time avionics will be conducted.
2. The use of FPGAs
in the Optimization of "PHY" IP Characterization
Process
Speaker: Davide Pereira
Supervisor of Test
and Characterization for IP validation
Synopsys Portugal
The characterization process of a PHY IP is a
complex task due to the need to control an
extended and variable digital interface and to
the need of applying many different control
words in certain moments of the characterization
process.
The use of FPGAs brings control to the stimuli
generation process, allowing to emulate the
behavior of a controller that implements the
upper layer of the communication protocol
associated to the PHY.
It also allows to automate the general test
tasks, like voltage and current measurements
implementing dedicated test tasks for that, and
control hardware devices that interact with the
DUT, emulating an interoperability
scenario. Examples of such applications will be
shown.
3. Reconfigurable Computing for Novel Applications
Speaker: Michael Hübner
Institute for Information Processing - ITIV
Karlsruhe Institute of Technology - KIT
Germany
Novel adaptive hardware architectures benefit
from reconfigurable hardware, which can adapt to
the different processing phases of a specific
application. However, run-time reconfiguration
mechanisms can be further exploited, for
example, to provide a fast system startup or in
novel processor concepts, where the
microarchitecture of a processor adapts to the
current instruction or data stream. This talk
will show novel exploitation methods for
run-time reconfigurable hardware.
4. FPGAs in Aerospace Applications
Speaker: João Costa Pinto
Aerospace Activity Manager
Efacec, Portugal
Efacec started its space activities in 2002 and
has been using FPGA’s in its backend processing
boards since then. There are only a few
specific FPGA families qualified for space-born
applications since they must have specific logic
structures to cope with the high radiation
levels to be able to recover from single upset
events. The digital design flow is also subject
to many constraints and only a few embedded
softcore processors are certified for this
domain of application. This talk will give an
overview of Efacec's activities related to the
development of electronic systems for use in
space, and describe the experience accumulated
during the last decade in this field.