• Conference
   Home
   Committee
   Social Program
   Conference Venue
   Call for Papers
   Program
   Registration
   Invited Speakers
   Special Sessions
      ALMA Project
      EU-Funded Projects
      Remote FPGA Labs
   Sponsors
   Past Events
   Travel Guide
   Local Guide
   Leisure Activities
   Conference Guide

Dates
   Submission deadline
25 October 2013
Abstracts due Nov. 4, 2013
Papers due Nov. 11, 2013 (strict deadline)
   Author Notification
6 December 2013
9 December 2013
   Camera-Ready and Author Registration
3 January 2014
   Early Registration until
21 February 2014
   Late Registration after
21 February 2014
   Conference date
14-16 April 2014

• Papers
   Guide for Presenters
   Guide for Authors
   Submit Your Paper

• Travel Information
   Accommodation
   Vilamoura
   How to get here

•  Contact
    Email to us
   Conference Secretariat

Special Sessions

We are delighted to inform that ARC’2014 includes three interesting special sessions:


ALMA Project Special Session


April 15 (Tuesday), 15:50 - 18:00, Session T3-B

Session Chairs: Jürgen Becker, KIT, Germany
Timo Stripf, KIT, Germany

Title: From Scilab to High Performance Embedded Multicore Systems: The ALMA Approach

Abstract:

The mapping process of high performance embedded applications to today’s multiprocessor system on chip devices suffers from a complex toolchain and programming process. The problem here is the expression of parallelism with a pure imperative programming language which is commonly C. This traditional approach limits the mapping, partitioning and the generation of optimized parallel code, and consequently the achievable performance and power consumption of applications from different domains. The Architecture oriented paraLlelization for high performance embedded Multicore systems using scilAb (ALMA) project aims to bridge these hurdles through the introduction and exploitation of a Scilab-based toolchain which enables the efficient mapping of applications on multiprocessor platforms from high level of abstraction. This holistic solution of the toolchain allows the complexity of both the application and the architecture to be hidden, which leads to a better acceptance, reduced development cost and shorter time-to-market. Driven by the technology restrictions in chip design, the end of Moore’s law and an unavoidable increasing request of computing performance, ALMA is a fundamental step forward in the necessary introduction of novel computing paradigms and methodologies.

Within the session, we’ll present the ALMA approach for automatic compiling Matlab-like Scilab code to high-performance multicore systems. It will start with an overview of the overall project and the researched solution, followed by in-detail presentations of the toolchain components. The ALMA reconfigurable target architectures will be introduces together with their specification within an Architecture Description Language (ADL). In the following, the ADL-based coarse- and fine-grain parallelism extraction algorithms will be introduced. At the end of the session, we will demonstrate the toolchain usage from an end user perspective.


Please, visit the ALMA Project webpage for more information.



EU-Funded Projects Special Session


April 15 (Tuesday), 10:45 - 12:30, Session T1

Session Chair: M.D. Santambrogio, Politecnico di Milano, Italy


DeSyRe: on-demand Adaptive and Recongurable Fault-tolerant SoCs?
(I. Sourdis, C. Strydis, A. Armato, C.S. Bouganis, B. Falsa, G.N. Gaydadjiev, S. Isaza, A. Malek, R. Mariani, S. Pagliarini, D. Pnevmatikatos, D.K. Pradhan, G. Rauwerda, R.M. Seepers, R.A. Shak, G. Smaragdos, D.Theodoropoulos, S. Tzilis, and M. Vavouras)

Effective Reconfigurable Design: the FASTER Approach
(D. Pnevmatikatos, T. Becker, A. Brokalakis, G. Gaydadjiev, W. Luk, K. Papadimitriou, I. Papaefstathiou, O. Pell, C. Pilato, D. Pau, M. D. Santambrogio, D. Sciuto, and D. Stroobandt)

HARNESS Project: Managing Heterogeneous Compute Resources for a Cloud Platform
(José G.F. Coutinho, Oliver Pell, Eoghan O'Neill, Peter Sanders, John McGlone, Paul Grigoras, Wayne Luk and Carmelo Ragusa)

SAVE: Towards Efficient Resource Management in Heterogeneous System Architectures
(G. Durelli, M. Coppola, K. Djafarian, G. Kornaros, A. Miele, M. Paolino, O. Pell, C. Plessl, M.D. Santambrogio, and C. Bolchini)

Data Parallel Application Adaptivity and System-Wide Resource Management in Many-Core Architectures
(G. Massari, E. Paone, M. Scandale, P. Bellasi, G. Palermo, V. Zaccaria, G. Agosta, W. Fornaciari, C. Silvano)


Please, visit the EU-Funded Projects webpage for more information.



Remote FPGA Labs Special Session


April 15 (Tuesday), 15:50 - 17:10, Session T3-A

Session Chair: Jose Gabriel de Figueiredo Coutinho, Imperial College of London, UK

Online Learning, Assessment and Prototyping of Digital Systems using Remote Reconfigurable Computing
(Fearghal Morgan, National University of Ireland, Galway)

Abstract:

Engineering design is best learnt through practical hands-on experience. The presentation will illustrate Vicilogic, a self-paced, directed training, assessment and proto-typing platform for digital systems using a scalable array of remote FPGAs. The presentation will report on the use of Vicilogic in teaching since 2011. Visually probe inside remote FPGA hardware through animated web-based block diagrams, timing diagrams, state machines and truth tables. During the presentation, ARC attendees will be able to interact with the array of remote FPGAs and experience new methods for Reconfigurable Computing education. The presentation will describe the Vicilogic architecture and demonstrate the Vicilogic course builder, design animation creator and assessment tools which enable tutor creation of online teaching material.


eDiViDe: a remote learning platform for FPGA design
(Nele Mentens, Jochen Vandorpe, KU Leuven, Belgium)

Abstract:

eDiViDe (European Digital Virtual Design lab) is a European project funded by LLP-Erasmus funding of the EACEA and by OOF funding of the KU Leuven. The platform consists of many FPGA-driven setups that are locally hosted by universities in at least five different countries and remotely connected to a central server in Belgium. All setups are available through www.edivide.eu. Students can upload their VHDL-code to the remotely accessible FPGAs and evaluate the results of their design through video and/or audio feedback. This way, students can practice their digital design skills anytime and anywhere (given they have access to the internet through a browser). Further, the setups are related to the expertise of the participating research groups, which results in a motivating and inspiring learning environment. Besides practicing digital design skills through exercises at all levels, from beginner to expert, the platform also allows researchers to cooperate remotely. Finally, the platform can also be interesting for companies for recruiting or training purposes.


Tutorial

This session will be followed by hands-on sessions on Thursday, April 17, 8:30-12:30.

  • 08:30 - 10:00 Hands-on: Online Learning, Assessment and Prototyping of Digital Systems using Remote Reconfigurable Computing (Fearghal Morgan, National University of Ireland, Galway)
  • 10:00 - 10:30Coffee-Break
  • 10:30 - 12:30 Hands-on: eDiViDe: a remote learning platform for FPGA design (Nele Mentens, Jochen Vandorpe, KU Leuven, Belgium)
Please, visit the Remote FPGAs Labs webpage for more information.

ARC © 2014 Copyright Reserved