Description of the Project
A large part of today's applications is developed using high level programming languages like C. However, the importance of the hardware architecture and how it will use the application is crucial for its performance. In that sense, it's very important to optimize the code using hardware resources. This project will study the steps that need to be taken for an application developed in C to be optimized in an FPGA. It is inserted in the REFLECT project and the main goal is to, in the end, obtain a better performance from the subject application and find how it could be automatically done for other similar applications.
This project is developed as Dissertation for the Course Master in Electrical and Computers Engineering, Major in Telecommunications, Electronics and Computers by the student Joaquim Duarte Cardoso Azevedo, supervised by Prof. Dr. José Carlos dos Santos Alves, and this webpage will be updated during its progress.
Current State of the Project
The C application being optimized (3D Path Planning for UAVs) has been studied and profiled. The slower stages have been identified using Gprof.
Several alternatives have been implemented, studying the best design patterns to apply to this application. Among other tests, the best alternative was achieved by dividing the memory in four smaller memories, allowing more values to be read for each clock cycle.
The first version of the final report is finished.