ETW'99a:

Boundary Scan Test is now widely accepted and used for the structural test of Printed Circuit Boards. However, the more demanding requirements of prototype debug and validation are not sufficiently covered by the mandatory and optional operating modes described in the IEEE 1149.1 Standard. Previous work has focused on this problem, having resulted in a new set of user-defined optional instructions addressing the use of the BS register to store in real-time a sequence of contiguous vectors, captured at its parallel inputs without / until / after a certain condition is found. In this paper we describe the tradeoff between input channels and storage capacity, by proposing a new operating mode where the BS register is used to capture / store an n-bit sequence captured at one single functional pin. We also describe how this operating mode can be further extended into the P1149.4 domain, for capturing / storing the n-bit data stream generated by a sigma-delta converter placed in the TBIC.