Personal Web Page development (A)

Selection of the peripheral interfacing mechanism to implement and the set of parameterisable blocks for common interfaces and protocols; definition of a hardware template for building new IP blocks compliant with the interface module (B)

Development of the parameterisable modules for interfacing with common peripherals (C)

Development of a software tool to generate the complete FPGA project as a set of HDL sources and implementation constraints (D)

Development of a application programming interface for the Linux operating system to communicate and control the peripheral module (E)

Writing the dissertation (F)