Planing

planning.jpg

System Study --> 14Fev 19Fev (100%)

  • Analysis of the must important actual interface standards and determination of the required measurement processes for the standard specification verification

Lab Results Analysis --> 21Fev 26Fev (100%)

  • Analysis of real signals obtained from measurements done over the existent chips in order to validate the measurement processes identified on the previous task

Software Tool Development --> 28Fev 10May (100%)

  • Analogue signal analysis tool development

Software Tool Validation --> 10May 31May (100%)

  • Tool validation using a representative set of measurements obtained from previous projects simulations and lab data

Thesis Document Creation --> 1Jun 23Jun (100%)

  • Creation of the Thesis Document

Thesis Post-Submission Tasks --> 1Jul 26Jul (0%)

  • Presentation Preparation
    • SlideShow creation
    • Poster creation
  • Thesis Document Revision
    • Include suggestion made by supervisors on the document
  • Paper Creation

2nd Semester - Week 17 (20 - 25 Jun)

  • Thesis writing Done
  • Web Page Updated to include Thesis Report

2nd Semester - Week 15 & 16 (6 - 17 Jun)

  • Thesis writing ongoing
  • Simulations performed to extract waveforms for thesis document

2nd Semester - Week 13 & 14 (23 May - 3 Jun)

  • Software obtained results were cross-checked with lab ones
  • Software support diagrams were created
  • Thesis document creation is now the priority
  • On going
    • Thesis document creation

2nd Semester - Week 11 & 12 (9 - 20 May)

  • Signal analysis classes created
  • Eye diagram generation class created
  • Analog parameters extraction class created
  • Channel/Equalizer frequency response class created
  • Added Signal analysis report creation inside signal analysis classes
  • Added Data generation with possibility to add jitter
  • Added support for data generation with pre-emphasis
  • Created top level script to generate reports from raw data stored on .csv files
    • The intent is to characterize interfaces where clock and data are transmitted from TX macro to RX macro
    • The frequency relation between data clock and line clock is equal to 10
  • Created class to perform the convolution between analog signals and frequency responses
  • Created top level script for channel characterization
    • Clock Recovery Unit
    • Cable Modeling
    • Equalizer Modeling
    • Jitter Modeling
    • Data Pattern Generation
    • Jitter Analysis
    • Eye diagram creation
    • Analog parameters extraction
  • Added support statistical eye diagram generation

2nd Semester - Week 10 (26 - 29 Apr)

  • Python Classes creation to analyze analog signals (crossing point and period extraction)
  • Python Class creation to over sample analog signals
  • Python Class creation to under sample analog signals
  • Python Class creation to perform Clock Recovery from analog signals
  • Included jitter addition tasks on analog signals processing Python Classes
  • Python Class to perform cable equalization
  • On going
    • Python Class creation to perform the convolution between analog signal and reference equalizer
    • Python Class creation to perform Eye diagram measurements
    • Necessary to improve the algorithm responsible for the frequency extrapolation

2nd Semester - Week 8 & 9 (4 - 15 Apr)

  • Python Class creation to include the frequency to time domain functions
  • Impulse Response generation from band limited S-parameters
  • Impulse Response generation from a defined H(jw) function
  • Spice cable simulation to extract S-parameters
  • Spice impulse response generation for pre-defined LOW-PASS circuits

2nd Semester - Week 6 & 7 (21 Mar - 1 Apr)

  • Fourier Transform study
  • FFT and iFFT python tutorial study
  • Frequency domain signals study
  • Difficulties
    • Frequency domain to impulse response conversion.
    • Causality Enforcement on frequency domain signals

2nd Semester - Week 5 (14 - 18 Mar)

  • Jitter software Documentation draft creation ends
  • Updated jitter software tool to ensure coherence with documentation
  • Difficulties
    • It's being difficult to conciliate job and family time with thesis time
    • PC issues (solved)

2nd Semester - Week 4 (7 - 11 Mar)

  • Jitter software Documentation creation started
  • Documentation figures creation

2nd Semester - Week 3 (28Feb - 4 Mar)

  • Jitter software decomposition tool uploaded to Resources page
  • The jitter tool was developed using python
  • Multi-thread was added to the tool, decreasing the overall processing time (on multi core CPUs)
  • Difficulties
    • The conversion from python to an executable windows file (special python commands were needed to ensure correct support of multi-thread)
    • The jitter histograms acquire on lab have a big time step resulting on a less accurate jitter decomposition values

2nd Semester - Week 2 (21-25 Feb)

  • Lab Reports analysis
  • Silicon raw data was acquired to be used on the development process
  • Jitter histograms were stored on .csv files
    • One of the difficulties of using post processed data is the lack of information about the signal behavior
    • Jitter histograms have a bigger time step

2nd Semester - Week 1 (14-18 Feb)

  • Meeting with the advisor
  • MIPI, HDMI and USB standards study
  • Specification of the principal measures done by the software tool
    • Eye diagram generation
    • Jitter decomposition
    • Intra-Pair skew measurement
    • Inter-Pair skew measurement
    • Rise and Fall times measurement
    • Minimum and Maximum values of the analog signal for each digital representation
  • Draft specification of the software engine